1. Field
The embodiments discussed herein are related to a technique of executing a task(s) in a multi-core processor provided with a plurality of processor dies on each of which a plurality of processor cores is formed.
2. Description of the Related Art
In a multi-core processor provided with a plurality of processor cores within a single processor, each processor core may discretely execute a sequence of instructions. In consequence, each of the processor cores may also execute the sequence of instructions in parallel. Furthermore, a heterogeneous multi-core processor provided with a plurality of different types of processor cores in a single processor is well known.
This heterogeneous multi-core processor is provided with, for instance, an OS core executing a task(s) for an operating system (OS) and an operation core mainly executing operation processing, as the different types of processor cores as disclosed above.
In the conventional heterogeneous multi-core processors, a control unit controls an operating state of each core, whereby a task(s) may be executed. Based on the operating states of respective cores, the control unit selects the core to which a task(s) is assigned, and the control unit supplies the selected core with the task(s).
However, there is a problem in the conventional multi-core processor that control over the states of respective cores and over the selection or the like of the cores, to which the tasks are assigned, is complicated.